Month: October 2016

Using OpenOCD to debug ESP-8266 module

http://www.esp8266.com/wiki/doku.php?id=esp8266-module-family

http://www.myelin.co.nz/post/2016/2/6/

https://blog.attachix.com/live-debugging-with-open-source-tools-programming-for-esp8266-part-4/

https://github.com/sysprogs/esp8266-openocd

OpenOCD patches:

http://openocd.zylin.com/#/c/3348/

$ openocd -f interface/jlink.cfg -f target/esp8266.cfg
Open On-Chip Debugger 0.9.0 (2016-10-04-17:17)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst
adapter speed: 1000 kHz
stop_wdt
Info : J-Link ARM V8 compiled Nov 28 2014 13:44:46
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 80000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9224
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0x0
Info : Vref = 3.293 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1
Info : J-Link JTAG Interface ready
Info : clock speed 1000 kHz
Info : TAP esp8266.cpu does not have IDCODE
Warn : Warning: Target not halted, breakpoint/watchpoint state may be unpredictable.