Testing TizenRT on ESP32

Based on: https://github.com/Samsung/TizenRT/blob/master/build/configs/esp_wrover_kit/README.md

Making romfs.img...
/comum/workspace/ESP32/TizenRT/tools/fs/../../os/../build/output/bin/romfs.img was made.
######################################
##          Library Sizes           ##
######################################
	.text 	.data 	.bss 	 Total
	20 	158176 	69440 	227636 	libnet.a
	340 	8544 	118666 	127550 	libnet80211.a
	1824 	1492 	75100 	78416 	libapps.a
	1244 	5308 	59712 	66264 	libpp.a
	208 	2276 	36984 	39468 	libmesh.a
	1306 	926 	35620 	37852 	libphy.a
	0 	40 	35008 	35048 	libfs.a
	0 	684 	20812 	21496 	libwpa.a
	36 	1552 	18308 	19896 	NOLIB
	108 	560 	18768 	19436 	libexternal.a
	0 	2244 	16272 	18516 	libkernel.a
	472 	501 	15688 	16661 	libesp32.a
	272 	1388 	11568 	13228 	libarch.a
	288 	144 	5256 	5688 	libframework.a
	0 	8 	4820 	4828 	libdrivers.a
	280 	120 	3516 	3916 	libcoexist.a
	0 	0 	3448 	3448 	libgcc.a
	4 	4 	1904 	1912 	librtc.a
	0 	4 	1844 	1848 	libc.a
	0 	43 	800 	843 	libcore.a
	0 	0 	780 	780 	libmm.a
	0 	0 	780 	780 	libboard.a
	0 	0 	102 	102 	libsoc.a
	4 	1 	0 	5 	libwpa2.a
	0 	1 	0 	1 	libwps.a
alan@dev:/comum/workspace/ESP32/TizenRT/os$ make download ALL
 ALL
make -C ../build/tools/esp32  ALL
make[1]: Entering directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
python  /comum/workspace/ESP32/TizenRT/build/tools/esp32/esptool_py/esptool/esptool.py --chip esp32 elf2image --flash_mode "dio" --flash_freq "26m" --flash_size "4MB"  -o /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/tinyara.bin /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/tinyara.elf
esptool.py v2.5.0
Building partitions from /comum/workspace/ESP32/TizenRT/build/tools/esp32/partiton_table/partitions_singleapp.csv...
python  /comum/workspace/ESP32/TizenRT/build/tools/esp32/partiton_table/gen_esp32part.py -q   --offset 0x8000  /comum/workspace/ESP32/TizenRT/build/tools/esp32/partiton_table/partitions_singleapp.csv /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/partitions_singleapp.bin
Flashing binaries to serial port /dev/ttyUSB0 (app at offset 0x10000 )...
python  /comum/workspace/ESP32/TizenRT/build/tools/esp32/esptool_py/esptool/esptool.py --chip esp32 --port "/dev/ttyUSB0" --baud 230400 --before "default_reset" --after "hard_reset" write_flash -u --flash_mode "dio" --flash_freq "26m" --flash_size detect 0x8000 /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/partitions_singleapp.bin 0x10000  /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/tinyara.bin 0x1000 /comum/workspace/ESP32/TizenRT/build/tools/esp32/bootloader/bootloader.bin
esptool.py v2.5.0
Serial port /dev/ttyUSB0
Connecting......
Chip is ESP32D0WDQ6 (revision 1)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse
MAC: 24:0a:c4:a6:04:28
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 230400
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Wrote 16384 bytes at 0x00008000 in 0.7 seconds (181.5 kbit/s)...
Hash of data verified.
Wrote 671744 bytes at 0x00010000 in 30.0 seconds (178.9 kbit/s)...
Hash of data verified.
Flash params set to 0x0221
Wrote 32768 bytes at 0x00001000 in 1.5 seconds (177.3 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...
Flashing romfs image to serial port /dev/ttyUSB0, offset 0x003C0000...
python  /comum/workspace/ESP32/TizenRT/build/tools/esp32/esptool_py/esptool/esptool.py --chip esp32 --port "/dev/ttyUSB0" --baud 230400 --before "default_reset" --after "hard_reset" write_flash -u --flash_mode "dio" --flash_freq "26m" --flash_size detect 0x003C0000 /comum/workspace/ESP32/TizenRT/build/tools/esp32/../../output/bin/romfs.img
esptool.py v2.5.0
Serial port /dev/ttyUSB0
Connecting....
Chip is ESP32D0WDQ6 (revision 1)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse
MAC: 24:0a:c4:a6:04:28
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 230400
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Wrote 16384 bytes at 0x003c0000 in 0.7 seconds (180.3 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...
make[1]: Leaving directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
alan@dev:/comum/workspace/ESP32/TizenRT/os$ make download BOOTLOADER
 BOOTLOADER
make -C ../build/tools/esp32  BOOTLOADER
make[1]: Entering directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
Flashing bootloader to serial port /dev/ttyUSB0 (app at offset 0x1000)...
python  /comum/workspace/ESP32/TizenRT/build/tools/esp32/esptool_py/esptool/esptool.py --chip esp32 --port "/dev/ttyUSB0" --baud 230400 --before "default_reset" --after "hard_reset" write_flash -u --flash_mode "dio" --flash_freq "26m" --flash_size detect 0x1000 /comum/workspace/ESP32/TizenRT/build/tools/esp32/bootloader/bootloader.bin
esptool.py v2.5.0
Serial port /dev/ttyUSB0
Connecting......
Chip is ESP32D0WDQ6 (revision 1)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse
MAC: 24:0a:c4:a6:04:28
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 230400
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Flash params set to 0x0221
Wrote 32768 bytes at 0x00001000 in 1.5 seconds (178.4 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...
make[1]: Leaving directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
alan@dev:/comum/workspace/ESP32/TizenRT/os$ make download APP
 APP
make -C ../build/tools/esp32  APP
make[1]: Entering directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
make[1]: *** No rule to make target 'APP'.  Stop.
make[1]: Leaving directory '/comum/workspace/ESP32/TizenRT/build/tools/esp32'
make: *** [Makefile.unix:556: download] Error 2

After the firmware flashed enter on “minicom” (115200 8N1), you will see:

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
ets Jun  8 2016 00:22:57

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:5752
load:0x40078000,len:9020
load:0x40080000,len:6064
entry 0x40080330
I (29) boot: ESP-IDF v3.1-dirty 2nd stage bootloader
I (29) boot: compile time 18:12:49
I (41) boot: Enabling RNG early entropy source...
I (41) boot: SPI Speed      : 40MHz
I (41) boot: SPI Mode       : DIO
I (44) boot: SPI Flash Size : 4MB
I (49) boot: Partition Table:
I (52) boot: ## Label            Usage          Type ST Offset   Length
I (59) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (67) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (74) boot:  2 factory          factory app      00 00 00010000 00280000
I (82) boot: End of partition table
I (86) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x1824c ( 98892) map
I (130) esp_image: segment 1: paddr=0x00028274 vaddr=0x3ffb0000 size=0x01908 (  6408) load
I (132) esp_image: segment 2: paddr=0x00029b84 vaddr=0x40080000 size=0x00400 (  1024) load
I (137) esp_image: segment 3: paddr=0x00029f8c vaddr=0x40080400 size=0x06084 ( 24708) load
I (156) esp_image: segment 4: paddr=0x00030018 vaddr=0x400d0018 size=0x7e49c (517276) map
I (337) esp_image: segment 5: paddr=0x000ae4bc vaddr=0x40086484 size=0x02fa4 ( 12196) load
I (342) esp_image: segment 6: paddr=0x000b1468 vaddr=0x400c0000 size=0x00000 (     0) load
I (349) boot: Loaded app from partition at offset 0x10000
I (350) boot: Disabling RNG early entropy source...
ftl_ioctl: ERROR: MTD ioctl(0602) failed: -25
System Information:
        Version: 3.0
        Commit Hash: 650dfcd4b54a3d132e8753c4b4d8c41f3a1e0008
        Build User: alan@dev
        Build Time: 2020-06-12 11:46:12
        System Time: 06 Dec 2011, 00:00:00 [s] UTC 
TASH>>Hello, World!!
up_assert: Assertion failed at file:semaphore/sem_post.c line: 142 task: tash
xtensa_dumpstate: sp:         3ffe9648
xtensa_dumpstate: stack base: 3ffe9a48
xtensa_dumpstate: stack size: 0000103c
xtensa_stackdump: 3ffe9640: 0000004e 3f400e68 3ebdd8d9 ac32691d 6e3bb180 2c8c1ffb 3ffe9688 3ffe9668
xtensa_stackdump: 3ffe9660: 00000008 0ec148f7 1f55f435 a13fccfe 3f400f05 3f400c1e 800d4999 3ffe96a8
xtensa_stackdump: 3ffe9680: 3f400c1e 0000008e 3f400f05 3f400c1e 0000008e 3ffe85d0 800fd4aa 3ffe96c8
xtensa_stackdump: 3ffe96a0: 3ffe9968 00007fff 00000002 00000004 0000001f ffffffff 800fd4f9 3ffe96e8
xtensa_stackdump: 3ffe96c0: 3ffb00e8 00000002 00060523 3ffe97c8 00018044 000637ff 8014caf8 3ffe9708
xtensa_stackdump: 3ffe96e0: 3ffb007c 00000000 3ffb00e0 000000ff 3ffb00e8 0000007e 800d661e 3ffe9728
xtensa_stackdump: 3ffe9700: 3ffb007c 400fd4d8 3ffb61a8 3ffb1924 3ffb5e88 00000007 8010179a 3ffe9748
xtensa_stackdump: 3ffe9720: 00000000 0000001c 000000da 00000001 00000000 3ffb5fb0 800d617a 3ffe9768
xtensa_stackdump: 3ffe9740: 00000026 3ffe97c8 3ffb007c 000000ff 3ffb00e8 0000007e 800d5ee4 3ffe9788
xtensa_stackdump: 3ffe9760: 00000026 3ffe97c8 0000000f 3ffe98e8 3ffb1b34 3ffb5fec 400806d0 3ffe97a8
xtensa_stackdump: 3ffe9780: 00000000 3ffe97c8 3ffb61a8 3ffe84d0 3ffb5e88 00060e23 00040023 3ffe97c8
xtensa_stackdump: 3ffe97a0: 00018044 000637ff 00000002 00000004 0000001f ffffffff eef5989e 1e195405
xtensa_stackdump: 3ffe97c0: 1af1dd1f 44c22654 400f7d18 00060e30 800f82a2 3ffe9968 3ffe9b00 00000001
xtensa_stackdump: 3ffe97e0: 0edeafb8 00000000 00060e20 4edd5b06 800f7cff 3ffe9928 00000000 00000000
xtensa_stackdump: 3ffe9800: 3ffe84d0 00000000 00060e23 00000001 00000018 c09c93de cfac8e88 00000000
xtensa_stackdump: 3ffe9820: 00000000 00000000 400806ac 3ffe97c8 f637eb10 7f24dd94 816928f7 0e89e754
xtensa_stackdump: 3ffe9840: 3490f07c f14873f5 65dbf240 9ea7a3c4 f7fc150d 3c069485 2cc80f80 bc51bcbc
xtensa_stackdump: 3ffe9860: 177f5cf2 1284b777 f7b50c98 bcecc143 f2b993c2 c44a09ba 9f1470fa 8790438e
xtensa_stackdump: 3ffe9880: f4f7a8b4 363720c5 5ac53e9c 56cabdd2 fcac9b10 95f2d2a9 fdac54c2 9372b47b
xtensa_stackdump: 3ffe98a0: 5f874464 40e4ffda 3bbba1c2 1085bbf7 2e8c3d87 c2574fcc 092cc606 7340f44b
xtensa_stackdump: 3ffe98c0: c54639f5 02c9f733 800d48da 3ffe98e8 0000000a 00000090 80101cb0 3ffe9908
xtensa_stackdump: 3ffe98e0: 3ffe9968 00060e23 3ffe7730 00000001 3ffe84d0 3ffdfa0b 800f7cff 3ffe9928
xtensa_stackdump: 3ffe9900: 3ffe9968 00000000 3ffe84d0 00000000 00000000 00060e23 800f82a2 3ffe9968
xtensa_stackdump: 3ffe9920: 3ffe9b00 00000001 0000025a 71846df7 ddf54310 8e01fbfc 3ffb1b34 0edeafb8
xtensa_stackdump: 3ffe9940: 3ffe9b00 00000001 3ffe84d0 0000025a 00060e23 00000001 800d76f3 3ffe99a8
xtensa_stackdump: 3ffe9960: 000002ee 3ffe99e0 80077fff 00000000 4edd5b06 0edeafb8 00000000 00000000
xtensa_stackdump: 3ffe9980: 00000004 3ffe99e0 0edeafb8 3b9ac9ff 00060e20 4edd5b06 800d3738 3ffe99d8
xtensa_stackdump: 3ffe99a0: 3ffe9a70 00000003 00000001 3ffb5e88 00000001 3ffe9a4c 00000000 00000000
xtensa_stackdump: 3ffe99c0: 00000000 3ffe9b00 00000000 3ffe9a28 400d7634 00000000 00000006 00000000
xtensa_stackdump: 3ffe99e0: 00000008 00000000 00000008 831131a4 00000008 00000004 71fb95a1 6246dfb8
xtensa_stackdump: 3ffe9a00: 72280a85 f10a2eeb 00000008 00000008 00000000 3ffe99e0 00000000 3ffe9a48
xtensa_stackdump: 3ffe9a20: 00000000 00000000 00000000 00000000 00000000 00000000 66a51225 402c4fef
xtensa_stackdump: 3ffe9a40: 77242109 5d837785 6e3f512e 3ffe9a54 00000000 68736174 ed6ae100 0e4a6791
xtensa_registerdump:    PC: 400f7d18    PS: 00060e30
xtensa_registerdump:    A0: 800f82a2    A1: 3ffe9968    A2: 3ffe9b00    A3: 00000001
xtensa_registerdump:    A4: 0edeafb8    A5: 00000000    A6: 00060e20    A7: 4edd5b06
xtensa_registerdump:    A8: 800f7cff    A9: 3ffe9928   A10: 00000000   A11: 00000000
xtensa_registerdump:   A12: 3ffe84d0   A13: 00000000   A14: 00060e23   A15: 00000001
xtensa_registerdump:   SAR: 00000018 CAUSE: c09c93de VADDR: cfac8e88
xtensa_registerdump:  LBEG: 00000000  LEND: 00000000  LCNT: 00000000
xtensa_registerdump:  TMP0: 400806ac  TMP1: 3ffe97c8

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